The present invention relates to a semiconductor integrated circuit device, and particularly to an art that can be effectively utilized for a semiconductor integrated circuit device which includes a programmable ROM (read-only memory) onto which the data is written by a high voltage formed, for example, by an embedded booster circuit.
A semiconductor nonvolatile memory, such as an insulated gate field-effect transistor having a gate insulating film of double-layer construction consisting of a relatively thin silicon oxide film and a relatively thick silicon nitride film formed thereon (hereinafter such transistors will simply referred to as MNOS), holds the stored content even when a drive power source is broken. The MNOS is capable of electrically writing and erasing the stored data.
Under the erased condition or under the condition where the stored data has not been written, the threshold voltage of the MNOS takes a negative voltage such as -4 volts. To write or erase the stored data, an intense electric field is applied to the gate insulating film of the MNOS so that carriers are injected by the tunnel phenomenon.
In the writing operation, ground potential of the circuit, e.g., zero volt, is applied to the substrate gate of the MNOS, and a high voltage such as +25 volts is applied to the gate. A voltage of a level corresponding to the data to be written, such as a low voltage of nearly zero volt or a high voltage such as +20 volts is applied to the source region and drain region of the MNOS. As a high positive voltage is applied to the gate, a channel is induced in the surface of silicon region between the source region and the drain region. In this case, the potential of channel is the same as the potential of source region and drain region. Therefore, if a voltage of zero volt is applied to the source region and drain region as mentioned above, an intense electric field corresponding to the high voltage of the gate acts upon the gate insulating film. Accordingly, electrons as carriers are injected from the channel into the gate insulating film due to the tunnel phenomenon. Hence, the threshold voltage of MNOS changes from -4 volts mentioned above to a positive value such as +4 volts. On the other hand, if a voltage of +20 volts is applied to the source region and drain region as described above, a potential difference between the gate and the channel is as small as several volts. Namely, the gate insulating film is served with a voltage which is not sufficient to develop the tunnel phenomenon to inject electrons. Hence, the threshold voltage of MNOS does not change.
In erasing the data, a high voltage such as +25 volts is applied to the substrate gate while applying zero volt to the gate, to develop tunnel phenomenon in the reverse direction, so that electrons that serve as carriers are returned to the substrate gate. When such a memory element is used, the above-mentioned high voltage for writing must be supplied in addition to the power-source voltage that drives peripheral circuits such as address select circuits. Prior to accomplishing the present invention, therefore, the applicant has previously developed a semiconductor memory device which contains a booster circuit to form a high voltage for writing the data. It was, however, clarified by the inventors of the present invention that the problem arises as described below when a high voltage for writing is formed by the embedded booster circuit. That is, when the level of an external signal that designates the operation mode has not been determined at the time when the power source is closed or is started in the on state, the embedded booster circuit operates undesirably to form a high voltage for writing, presenting a probability of erroneous writing or erroneous erasing. To prevent the erroneous operation, it can be contrived to provide an external circuit which forms a control signal so that the program mode (writing mode) is not assumed. With such a method, however, the number of external parts increases, and the users will find it very inconvenient to use the device (as for the MNOS, reference should be made to, for example, Japanese Patent Laid-Open No. 156370/1980 (corresponding to U.S. Ser. No. 148,481 (abandoned) and divisional application of Ser. No. 487,085), journal "Nikkei Electronics, July 6, 1981, pp. 193-206).